Advanced bandwidth allocation in PCI bus architecture

Details Advanced bandwidth allocation in PCI bus architecture Advanced bandwidth allocation in PCI bus architecture

2007-06-12

2007-06-12

Myers, Paul R. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

Reexamination Certificate

active

10768924

ABSTRACT:
A bus arbitration system and method allocates total bus bandwidth between latency sensitive and latency insensitive interfaces by utilizing windows to divide the total bandwidth into latency sensitive and latency insensitive portions. Each interface is initially allocated top-up numbers of latency sensitive and latency insensitive tokens to proportionally allocate bus accesses between the interfaces according to their requirements. For an interface having access to the bus, the number of tokens is decremented for each successful bus transfer.

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HT.book, Chapter 5: Flow Control, pp. 99-117, downloaded from the Internet: <http://www.awprofessional.com/content/images/0321168453/samplechapter/mindsharech05.pdf>.

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