Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-01-10
2006-01-10
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S032000, C326S034000, C326S087000
Reexamination Certificate
active
06985006
ABSTRACT:
The rate at which the output of an output buffer changes is determined, and the strength of the output buffer is modified until the rate of change reaches a desired rate. The desired rate may be selected such that strength of the output buffer matches the then existing load. In other words, the strength may be only as much as needed to drive the then existing load. As a result, effects such as switching noise may be considerably reduced.
REFERENCES:
patent: 5621335 (1997-04-01), Andresen
patent: 6486698 (2002-11-01), Yanagawa
Appala Visvesvaraya Pentakota
Udupa Anand Hariraj
Brady W. James
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tran Anh Q.
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