Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-02-28
2008-11-04
Tabler, Matthew C. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
Reexamination Certificate
active
07446557
ABSTRACT:
In order to generate a control signal for adjusting a driver stage with an adjustable output impedance, an impedance signal is generated for a measure of the output impedance of the driver stage. The difference between the impedance signal and a reference signal is calculated, and passed to a sigma-delta modulator to generate a digital bitstream signal. The control signal is then generated depending on the bitstream signal, where the frequencies of the two signal states in the bitstream signal are evaluated by means of digital counters. Depending on the difference of the determined frequencies of the two signal states, a counter is increased or reduced, and the control signal is generated depending on the count of the counter. The impedance signal may be generated by a replica circuit of a pull-up region or a pull-down region of the driver stage to be adjusted.
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Icking Henrik
Mauthe Manfred
Brinks Hofer Gilson & Lione
Infineon Technologies
Tabler Matthew C.
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