Adjustable elasticity FIFO buffer have a number of storage...

Details Adjustable elasticity FIFO buffer have a number of storage... Adjustable elasticity FIFO buffer have a number of storage...

2007-06-19

2007-06-19

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Flow controlling

C710S033000, C710S052000, C710S058000, C710S060000

Reexamination Certificate

active

10811126

ABSTRACT:
A method of processing a data stream through a buffer is performed in accordance with a write clock and a read clock. The buffer has a plurality of sequentially numbered storage cells. The method includes the steps of selecting an initial preload value, with the selecting step including determining a product of the maximum frequency offset between the write and read clocks, and a maximum time between arbitrary symbols in the data stream. The storage cells then receive data units in response to a write pointer. Data units are then provided from the storage cells in response to a read pointer.

REFERENCES:
patent: 4600945 (1986-07-01), Bolger
patent: 6233629 (2001-05-01), Castellano
patent: 6408349 (2002-06-01), Castellano
patent: 6611884 (2003-08-01), Castellano
patent: WO 97/17777 (1997-05-01), None
PCI Express Base Specification Revision 1.0a, by PCI-SIG, Apr. 15, 2003, pp. 1-220.

Affiliated with

Also associated with

Rating

Adjustable elasticity FIFO buffer have a number of storage... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Adjustable elasticity FIFO buffer have a number of storage..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Adjustable elasticity FIFO buffer have a number of storage... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3832057