Adjustable biasing voltage for a bus line and associated method

Details Adjustable biasing voltage for a bus line and associated method Adjustable biasing voltage for a bus line and associated method

1997-12-30

2000-07-04

Santamauro, Jon

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

326 82, 326 86, H03K 1716

Patent

active

060844248

ABSTRACT:
Method and apparatus for voltage biasing a bus line are disclosed. In one embodiment, a terminator voltage biases a differential data line having a first bus line and a second bus line. The terminator, includes a resistor network, a biasing control circuit, and a controllable biasing circuit. The resistor network is coupled to the differential data line and has a network impedance substantially equal to the characteristic bus impedance of the differential data line. The controllable biasing circuit is coupled to the resistor network and is configured to generate (i) a first control signal and (ii) a second control signal. The controllable biasing circuit is coupled to the resistor network and to the biasing control circuit. The controllable biasing circuit is configured to generate a differential biasing voltage between the first bus line and the second bus line that is based on the first control signal and the second control signal.

REFERENCES:
patent: 5585741 (1996-12-01), Jordan
patent: 5942809 (1999-08-01), Hashimoto

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