Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
Reexamination Certificate
1998-04-24
2001-01-23
De Cady, Albert (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Data formatting to improve error detection correction...
C714S786000, C711S157000
Reexamination Certificate
active
06178530
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a memory addressing scheme suitable for convolutional interleaver and de-interleaver configurations used, e.g., in digital television (DTV) data transmission and reception.
2. Discussion of the Known Art
Noise frequently causes bit errors in digital data transmission systems. To detect and correct such bit errors, several different error correction techniques are known. Interleaving is one method especially effective to cure errors induced by noise bursts, wherein a large number of adjacent bits of a data bit stream may be affected.
An interleaver rearranges the order of data bytes in an original data stream before transmission, by re-locating a certain number of adjacent bytes in the stream according to a defined interleave pattern. At the receiving end, a de-interleaver restores the order of the received data bytes, to obtain the original order of the bytes in the data bit stream.
A recently defined digital television or “DTV” standard for the Unites States prescribes convolutional interleaving to protect broadcast DTV data from noise bursts when the data is transmitted over long distances from a transmitter site to a DTV receiver site. The standard states:
“The interleaver employed in the VSB [vestigial sideband] transmission system shall be a 52 data segment (intersegment) convolutional byte interleaver. Interleaving is provided to a depth of about ⅙ of a data field (4 ms deep). Only data bytes shall be interleaved. The interleaver shall be synchronized to the first data byte of the data field. Intrasegment interleaving is also performed for the benefit of the trellis coding process.” Advanced Television Systems Committee (ATSC) Document A/53, Section 4.2.4. The prescribed convolutional interleaver is shown in FIG. 6 of ATSC doc. A/53, and is reproduced in
FIG. 1
of the present disclosure.
A data de-interleaver is described in ATSC Document A/54. Section 10.2.3.10 of doc. A/54 states:
“The convolutional de-interleaver performs the exact inverse function of the transmitter convolutional interleaver. Its ⅙ data field depth, and intersegment “dispersion” properties allow noise bursts lasting about 193 microseconds to be handled. Even strong NTSC co-channel signals passing through the NTSC rejection filter, and creating short bursts due to NTSC vertical edges, are reliably handled due to the interleaving and RS [Reed-Solomon] coding process. The de-interleaver uses Data Field Sync for synchronizing to the first data byte of the data field.” The prescribed de-interleaver is shown in FIG. 10.14 of ATSC doc. A/54 and is reproduced in
FIG. 2
of the present disclosure.
All relevant portions of both ATSC Documents A/53 and A/54 are incorporated by reference herein.
As seen in
FIGS. 1 and 2
, a typical convolutional interleaver/de-interleaver for accommodating the DTV standard, requires 51 branches each comprised of a different number of byte shift registers. The known approach requires 51 independent counters to keep track of I/O addresses for each branch, an 8-bit wide 52×1 input de-multiplexer, an 8-bit wide 52×1 output multiplexer, and the required I/O selection circuitry. This approach thus requires a relatively large amount of hardware.
U.S. Pat. No. 5,572,532 (Nov. 5, 1996) discloses a convolutional de-interleaver for DTV data, including an address signal generator for repeatedly generating sequences of address signals for a de-interleaving random access memory (RAM). See also U.S. Pat. No. 5,241,563 (Aug. 31, 1993) and U.S. Pat. No. 5,537,420 (Jul. 16, 1996).
SUMMARY OF THE INVENTION
According to the invention, a method of generating successive addresses suitable for carrying out data interleaving or de-interleaving in a data stream using a random access memory (RAM), includes configuring a number of memory branches in a RAM wherein at least some of the branches have different numbers of memory locations for reading out and for storing bytes of a data stream, thus defining memory branches of different lengths in the RAM, determining a start address for each memory branch in the RAM corresponding to a first memory location of each branch, determining for each memory branch an offset value to be added to the start address for the branch for addressing a memory location of the branch, and, if an offset value does not exceed the length of a corresponding branch, generating an address corresponding to the sum of the start address and the offset value for addressing a successive memory location of the branch and incrementing the offset value for the branch by one, and, when an offset value equals the length of a corresponding branch, generating an address corresponding to a last memory location of the branch and resetting the offset value for the branch to zero.
For a better understanding of the invention, reference is made to the following description taken in conjunction with the accompanying drawing and the appended claims.
REFERENCES:
patent: 5241563 (1993-08-01), Paik et al.
patent: 5313606 (1994-05-01), Luong et al.
patent: 5530837 (1996-06-01), Williams et al.
patent: 5537420 (1996-07-01), Huang
patent: 5572532 (1996-11-01), Fimoff et al.
patent: 5659698 (1997-08-01), Weng et al.
patent: 5928371 (1999-07-01), Robinson, Jr. et al.
Advanced Television Systems Committee (ATSC), ATSC Digital Television Standard, Doc. A/53 (1995), pp. 49-50.
ATSC, Guide to the use of the ATSC Digital Television Standard, Doc. A/54 (1995). p. 118.
Aman Ahmad K.
Weckenbrock Hermann J.
Cady Albert De
Lamarre Guy J.
Law Office of Leo Zucker
Lucent Technologies - Inc.
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