Addressing error and address detection systems and methods

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S730000

Reexamination Certificate

active

07418636

ABSTRACT:
Addressing error detection systems and methods are disclosed. A target address is written to a memory in an electronic system and subsequently output on an address path through which the memory is addressable. An addressing error is detected by determining whether the target address output on the address path is detected at the memory. Address detection at the memory involves storing the target address, monitoring the address path for the target address, and providing an address detection indication based on whether the target address is detected on the address path. The address detection indication may be provided, for example, by setting a flag in a data structure which is stored in the memory.

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patent: 6941493 (2005-09-01), Phelps
patent: 2004/0162956 (2004-08-01), Hidai et al.
Microsoft Computer Dictionary, 2002, Microsoft Press, 5th ed., pp. 142.

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