Addressable MNOS cell for non-volatile memories

Details Addressable MNOS cell for non-volatile memories Addressable MNOS cell for non-volatile memories

1976-01-30

1978-09-05

Konick, Bernard

Static information storage and retrieval

Systems using particular element

Semiconductive

357 23, G11C 1140

Patent

active

041125070

ABSTRACT:
An addressable MNOS transistor structure is disclosed employing a plurality of gate regions between the source and drain diffusion regions of each transistor cell. The transistor cell is characterized by high and low threshold states which are settable by selective actuation of the corresponding plurality of gate regions. Reading of the state of the transistor is accomplished by applying a read voltage, having a value intermediate the two threshold values, to the corresponding plurality of gate regions and measuring whether or not an applied charge discharges from one diffusion region to the other.

REFERENCES:
patent: 3720922 (1973-03-01), Kosonocky
patent: 3728695 (1973-04-01), Bentchkowsky
patent: 3744036 (1973-07-01), Bentchkowsky

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