Address translation table synchronization

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C711S202000, C711S203000, C711S205000, C711SE12059, C711SE12014, C711SE12058

Reexamination Certificate

active

07917723

ABSTRACT:
A system, method and computer-readable medium for updating an address translation table. In the method, a message indicating a physical memory location that corresponds to a virtual address is received from a processor. An I/O Memory Management Unit (IOMMU) is used to update an entry within the address translation table corresponding to the virtual address according to the indicated physical memory location.

REFERENCES:
patent: 5604864 (1997-02-01), Noda
patent: 6163806 (2000-12-01), Viswanathan et al.
patent: 6446188 (2002-09-01), Henderson et al.
patent: 2002/0152428 (2002-10-01), James et al.
patent: 2005/0050295 (2005-03-01), Noel et al.
patent: 2005/0097384 (2005-05-01), Uehara et al.
patent: 2006/0161723 (2006-07-01), Sena et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Address translation table synchronization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address translation table synchronization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address translation table synchronization will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2647423

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.