Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1998-07-08
2000-10-31
Yoo, Do Hyun
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711202, 711216, 707100, 370389, 370392, 370400, G06F 1200
Patent
active
061417386
ABSTRACT:
A forwarding table data structure and a memory optimization process that involves variable multi-stage lookups. The data structure for an address translation system includes, a plurality of blocks, each of the plurality of blocks includes a contiguous set of data records; each data record includes a pointer and an action indicator; if the action indicator is equal to a prescribed value the pointer represents an address of a translation target in the data structure; and if the action indicator is not equal to the prescribed value the pointer represents an address of a selected one of the plurality of blocks in the data structure. The data structure is built based on the input data set (e.g. IP routing table) to be memory optimized. The number of stages can be flexibly determined based on memory restrictions, input data set etc. Since the data structure is essentially "customized" optimal routing speeds can be obtained.
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Degermark, Mikael et al., Small Forwarding Tables for Fast Routing Lookups, Department of Computer Science and Electrical Engineering, Lule.ang. University of Technology, S-971 87 Lule.ang., Sweden.
Waldvogel, Marcel et al., Scalable High Speed IP Routing Lookups, Computer Engineering and Networks Laboratory, ETH Zurich, Switzerland; Computer and Communications Research Center, Washington University in St. Louis, USA.
Depelteau Gary Michael
Munter Ernst A.
Moazzami Nasser
Nortel Networks Corporation
Wood Max R.
Yoo Do Hyun
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