Address transition pulse circuit

Details Address transition pulse circuit Address transition pulse circuit

1983-12-01

1986-09-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307562, 307265, 307603, 365230, H03K 19094, H03K 3017, H03K 513

Patent

active

046148833

ABSTRACT:
A circuit for generating a pulse in response to an address transition using an input NOR gate to initiate the generation of the pulse. A delay circuit provides a delayed signal for actively terminating the pulse after a predetermined time period. An inhibit circuit is used to prevent the delayed signal from attempting to actively terminate the pulse when there has been another address transition, thereby saving power.

REFERENCES:
patent: 4150310 (1979-04-01), Emile, Jr.
patent: 4329640 (1982-05-01), Reiner et al.
patent: 4365174 (1982-12-01), Kucharewski
patent: 4398102 (1983-08-01), Stewart
patent: 4442481 (1984-04-01), Brahmbhatt
patent: 4471240 (1984-09-01), Novosel
Chappell et al., "Decoder Circuit", IBM Tech. Disclosure Bulletin, vol. 24, No. 5, Oct. 1981, pp. 2490-2491.

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