Address selection for an I2C bus

Communications: electrical – Selective – Synchronizing

Reexamination Certificate

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Details

C340S004370, C340S003500, C340S003100, C710S300000

Reexamination Certificate

active

08040215

ABSTRACT:
An address configuration circuit and a method for sharing a series bus connected to a first device between two secondary devices by a configuration within each secondary device of a different address, including, in a configuration phase, the temporary configuring of an output terminal of each secondary device in a mode of reading of the voltage present on this terminal to select one address out of two within the device.

REFERENCES:
patent: 5592633 (1997-01-01), Casis et al.
patent: 5689196 (1997-11-01), Schutte
patent: 6097208 (2000-08-01), Okajima et al.
patent: 6622188 (2003-09-01), Goodwin et al.
patent: 6745270 (2004-06-01), Barenys et al.
patent: 7092041 (2006-08-01), Lendaro
patent: 7386635 (2008-06-01), Hsu
patent: 2005/0097230 (2005-05-01), Hsu
French Search Report from French Patent Application 05/51218, filed May 11, 2005.

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