Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Patent
1997-10-28
2000-08-22
Lane, Jack A.
Electrical computers and digital processing systems: memory
Address formation
Generating a particular pattern/sequence of addresses
365200, G11E 2900, G06F 1216
Patent
active
061087629
ABSTRACT:
An address processor (205) receives contiguous row and column addresses from an address decoder (151). In response, the address processor (205) applies a scattering function to the contiguous row and column addresses to produce scattered row and column addresses of scattered locations in the memory (155).
REFERENCES:
patent: 5414758 (1995-05-01), Kuok
patent: 5537631 (1996-07-01), Wong et al.
patent: 5758056 (1998-05-01), Barr
Law Kwok Wah Lawrence
Sin Fu Chor Alfred
Lane Jack A.
Motorola Inc.
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