Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2006-10-10
2006-10-10
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C712S208000, C712S210000, C712S225000
Reexamination Certificate
active
07120779
ABSTRACT:
A data processing system2is provided supporting address offset generating instructions which encode bits of an address offset value using previously redundant bits in a legacy instruction encoding whilst maintaining backwards compatibility with that legacy encoding.
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ARM Limited
Nixon & Vanderhye P.C.
Padmanabhan Mano
Patel Kaushik
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