Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2005-04-05
2005-04-05
Nguyen, T (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S202000, C711S204000, C711S206000, C711S207000, C711S208000
Reexamination Certificate
active
06877083
ABSTRACT:
A behavioral memory mechanism for performing address mappings within a data processing system is disclosed. The data processing system includes a processor, a real memory, a address converter, and an address translator. The real memory has multiple real address locations, and each of the real address locations is associated with a corresponding one of many virtual address locations. The virtual address locations are divided into two non-overlapping regions, namely, an architecturally visible virtual memory region and a behavioral virtual memory region. The address converter converts an effective address to an architecturally visible virtual address and a behavioral virtual address. The architecturally visible virtual address is utilized to access the architecturally visible virtual memory region of the virtual memory and the behavioral virtual address is utilized to access the behavioral virtual memory region of the virtual memory. The address translator translates the architecturally visible virtual address to a first real address associated with the real memory, and the behavioral virtual address to a second real address associated with the real memory.
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Arimilli Ravi K.
Starke William J.
Dillon & Yudell LLP
Nguyen T
Salys Casimer K.
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