Address mapping for memory

Details Address mapping for memory Address mapping for memory

1979-06-11

1982-01-12

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

371 8, 371 21, G11C 1140, G11C 1300

Patent

active

043109012

ABSTRACT:
In a large scale addressable memory which is addressed with an applied block and word address, an auxiliary memory stores word addresses of defective locations within each block of the main memory. Such defective location addresses are supplied by the auxiliary memory in response to the applied block address. A set of comparators compare the applied word address and the defective location word addresses and signal any match. The auxiliary memory also provides a substitute location address for each stored defective location address. When a match is found by a comparator, the corresponding substitute location address is provided to the main memory to access a substitute memory location, which is known to be good.

REFERENCES:
patent: 3544777 (1970-12-01), Winkler
patent: 3633175 (1972-01-01), Harper
patent: 4058851 (1977-11-01), Scheuneman

Affiliated with

Also associated with

Rating

Address mapping for memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address mapping for memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address mapping for memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1544173