Address generation unit with segmented addresses in a microproce

Details Address generation unit with segmented addresses in a microproce Address generation unit with segmented addresses in a microproce

1996-04-17

1998-05-05

Moore, David K.

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

711100, 711 3, 711206, 711200, G06F 1202, G06F 1206, G06F 1210

Patent

active

057490848

ABSTRACT:
A processor having an address generation unit (AGU) for generating an address corresponding to an entry that is to be fetched. The AGU includes a segment register file for storing address segments, and a circuit for rearranging noncontiguous base and limit bit positions of a first address segment in order to generate a second address segment having all base and limit bits in a contiguous order. The AGU further includes a circuit for executing a single microinstruction to perform read and write operations on a selected field of the second address segments stored in the segment register file.

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patent: 5144551 (1992-09-01), Cepulis
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patent: 5255379 (1993-10-01), Melo
patent: 5274834 (1993-12-01), Kardach et al.
patent: 5303378 (1994-04-01), Cohen
patent: 5590297 (1996-12-01), Huck et al.

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