Address gate for memories to protect stored data, and to simplif

Details Address gate for memories to protect stored data, and to simplif Address gate for memories to protect stored data, and to simplif

1980-12-22

1983-10-11

Martin, John C.

Static information storage and retrieval

Read/write circuit

Testing

371 21, 365230, G11C 700, G11C 2900

Patent

active

044096755

ABSTRACT:
An address gate for a random access memory includes a pair of emitter-coupled and collector-coupled transistors, and another transistor emitter-coupled to the pair of transistors. Complimentary outputs are read at the coupled emitters of the pair of transistors and the collector of the other transistor respectively, there being an input signal applied to the base of one of the pair of transistors, and a control signal applied to the base of the other of the pair of transistors, which overrides the operation of one of the pair of transistors when the control signal is in its high state.

REFERENCES:
patent: 3624620 (1971-11-01), Andrews
patent: 3757310 (1973-09-01), Croxon et al.
patent: 4195358 (1980-03-01), Yuen

Affiliated with

Also associated with

Rating

Address gate for memories to protect stored data, and to simplif does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address gate for memories to protect stored data, and to simplif, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address gate for memories to protect stored data, and to simplif will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1279549