Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-04-17
2007-04-17
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S203000, C711S202000, C711S200000, C711S172000, C711S170000, C711S100000
Reexamination Certificate
active
10707645
ABSTRACT:
A memory address decoding method for determining if a given address is located in one of a plurality of sections. Each section has a plurality of memory units arid each memory unit has a unique corresponding address, the corresponding address using the binary system. The method includes making die corresponding address in a section with greater size smaller than the corresponding address in a section with smaller size, building a single bit-pattern for each section from all corresponding addresses, and comparing if at least one comparative bit of the given address matches those in any of the bit-patterns so as to determine the given address is located in one of the sections based on the comparison.
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Dillon Samuel
Hsu Winston
Shah Sanjiv
VIA Technologies Inc.
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