Address conversion apparatus, address conversion method and...

Details Address conversion apparatus, address conversion method and... Address conversion apparatus, address conversion method and...

2006-01-24

2006-01-24

Song, Jasmine (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S002000, C711S101000, C711S102000, C711S104000, C710S033000

Reexamination Certificate

active

06990565

ABSTRACT:
An address output apparatus capable of retaining a pre-extension upper compatibility of software post memory extension and of accessing separated RAM areas by consecutive addresses, without needing to alter CPU architecture. The address output apparatus includes an address conversion circuit20that allots to a RAM30a basic RAM area and a first area, being one of two area obtained by dividing an extension RAM area, allots to a RAM50a second area, being an area other than the first area of the extension RAM area, and converts logical address signals designated by a CPU10to physical address signals based on a state of the allotting.

REFERENCES:
patent: 5329631 (1994-07-01), Ishibashi et al.
patent: 6378058 (2002-04-01), Furuhashi
patent: 6425047 (2002-07-01), Ozaki
patent: 6728860 (2004-04-01), Lloyd-Jones
patent: 2003/0126349 (2003-07-01), Nalawadi et al.
patent: 2004/0078513 (2004-04-01), Yamazaki

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