Address conflict detection system employing address indirection

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area


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711141, G06F 1200, G06F 1314




An improved conflict detection system for use in maintaining memory coherency in a multiprocessor, shared-cache memory system. The system includes a queue for storing pointers to request addresses that resulted in cache misses. The addresses associated with the queued pointers will generally be presented to a main memory for processing based on a predetermined priority scheme. The system further includes conflict detection logic which uses the queue pointers and the request addresses provided by associated ones of the processors to determine if any two of the queued requests are associated with the same request address. If so, a conflict exists, and the request queue later in time must be re-directed to cache instead of being presented to main memory to maintain cache coherency. The system further includes a mechanism for using pointers to detect conflict situations associated with flush and replacement cache operations. Because the conflict detection system queues pointers to addresses, instead of the addresses themselves, a large amount of silicon area can be saved. In addition, the system performs all conflict detection operations using full address compares to eliminate the detection of false conflicts.

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patent: 5678026 (1997-10-01), Vartti et al.
patent: 5721855 (1996-07-01), Hinton et al.
patent: 5742785 (1998-04-01), Stone
patent: 5802578 (1998-09-01), Lovett


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