Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2006-05-03
2009-12-08
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S300000
Reexamination Certificate
active
07631110
ABSTRACT:
An address assignment mechanism. A computer system may include one or more types of slave devices. Each slave device includes an internal device ID. Slave devices of the same type include the same internal device ID. The master device may broadcast a message through the use of a protocol to each of the slave devices to initiate an address assignment operation. Each of the slave devices determines whether the broadcast device ID included in the broadcast message matches the internal device ID associated with the slave device. If the broadcast device ID matches the internal device ID, the linear bus address included in the broadcast message is assigned to the slave device. The bit size of the linear bus address may be smaller than that of the broadcast device ID. After the address assignment operation, the master device may communicate with the slave device using the assigned linear bus address rather than the device ID.
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Berenbaum Alan D.
Weiss Raphael
Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Rinehart Mark
Standard Microsystems Corporation
Vu Trisha
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