Computer graphics processing and selective visual display system – Display driving control circuitry – Physically integral with display elements
Patent
1997-09-30
1999-11-09
Chauhan, U.
Computer graphics processing and selective visual display system
Display driving control circuitry
Physically integral with display elements
345501, 710123, G06T 900, G06F 1500
Patent
active
059823607
ABSTRACT:
An adaptive-selection method for memory access priority control in MPEG processor. The processor has functional modules that include an input interface, a CPU, an audio decoder, a video decoder, an audio processor, a video processor and a memory controller. Each of the modules gains control over the data bus via arbitration by the memory controller for accessing the memory. The access priority of the CPU to the data bus is maintained at a relatively lower level except when the CPU needs to perform parsing on the MPEG compressed data and implementing the initial decoding of the audio compressed data. The use of data bus bandwidth is therefore balanced among all the system resources thereby increasing the overall system performance.
REFERENCES:
patent: 5675390 (1997-10-01), Schindler et al.
patent: 5754801 (1998-05-01), Lambrecht et al.
patent: 5805840 (1998-09-01), Dutton
patent: 5815634 (1998-09-01), Daum et al.
Pan Jyh-Shin
Wu Wen-Yi
Chauhan U.
United Microelectronics Corp.
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