Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1995-10-13
1998-09-15
Swann, Tod R.
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711 6, 711203, 711202, 711213, G06F 1200
Patent
active
058095608
ABSTRACT:
An adaptive read ahead cache is provided with a real cache and a virtual cache. The real cache has a data buffer, an address buffer, and a status buffer. The virtual cache contains only an address buffer and a status buffer. Upon receiving an address associated with the consumer's request, the cache stores the address in the virtual cache address buffer if the address is not found in the real cache address buffer and the virtual cache address buffer. Further, the cache fills the real cache data buffer with data responsive to the address from said memory if the address is found only in the virtual cache address buffer. The invention thus loads data into the cache only when sequential accesses are occurring and minimizes the overhead of unnecessarily filling the real cache when the host is accessing data in a random access mode.
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Compaq Computer Corporation
Swann Tod R.
Tzeng Fred Fei
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