Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-02-02
2001-07-31
Etienne, Ario (Department: 2155)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S108000
Reexamination Certificate
active
06269416
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to peripheral component interconnect (PCI) systems for computer systems, and more particularly to adaptive PCI slots for accepting PCI cards to couple external devices to a microprocessor in a computer system.
BACKGROUND OF THE INVENTION
A computer system typically includes a peripheral component interconnect (PCI) system to interconnect one or more microprocessors with attached external devices. A PCI system includes PCI slots which are disposed in the computer system to be externally accessible so that PCI cards can be inserted therein. Compatible external devices can be plugged into the PCI cards. PCI cards are one type of expansion card. Each PCI slot typically includes a PCI connector and a PCI controller to control the PCI connector and to generate a PCI clock.
The PCI standard specification defines separate expansion PCI connectors for 5-volt signaling and 3.3-volt signaling environments. A location of a physical key in the PCI connector controls which type of signaling environment is to be employed in the PCI system. 5-volt only PCI cards only physically fit into a PCI connector keyed for 5-volt signaling. Similarly, 3.3-volt only PCI cards only physically fit into a PCI connector keyed for 3.3-volt signaling. A third type of PCI card is a universal card which can physically fit into a connector keyed for 5-volt or 3.3-volt signaling. The universal card is designed to adapt to the signaling environment of the PCI connector.
According to the PCI standard specification, the 5-volt signaling environment allows a maximum clock rate of 33 MHz, and the 3.3-volt signaling environment allows a maximum clock rate of 66 MHz. Therefore, conventional computer systems which support 5-volt only (33 MHz) and universal (33 or 66 MHz) PCI cards, must include 5-volt keyed PCI connectors for 33 MHz operation and 3.3-volt keyed PCI connectors for 66 MHz operation. The input/output (I/O) throughput of a computer system is limited by the number of PCI slots in the computer system that can be configured into the computer system's form factor design and the maximum frequency and maximum data width operation of the PCI slots. Thus, there is a high demand for a maximum number of high-performance PCI slots which operate at 66 MHz and can handle 64 bit transfer operations. The more high performance 66 MHz/64 bit PCI slots accommodated into the computer system maximizes the I/O bandwidth potential of the computer system. Nevertheless, many computer systems must also accommodate 5-volt only PCI cards which only operate up to 33 MHz. Conventional computer systems that include 3.3-volt type slots and 5-volt type slots degrade both performance and connectivity.
For reasons stated above and for other reasons presented in greater detail in the Description of the Preferred Embodiments section of the present specification, a computer system is desired which accommodates 5-volt only type PCI cards operating at 33 MHz and universal type PCI cards operating at 66 MHz in the same type PCI slots.
SUMMARY OF THE INVENTION
The present invention provides a computer system including a first power rail having a first voltage level and a second power rail having a second voltage level. A PCI connector is capable of receiving a first type PCI card having input/output (I/O) buffers operable at the first voltage level. The PCI connector is also capable of receiving a second type PCI card having adaptable I/O buffers operable at the first voltage level or the second voltage level. The PCI connector includes voltage I/O pins for supplying power to the I/O buffers in a PCI card inserted in the PCI connector. Sensing circuitry senses which type of PCI card is inserted in the PCI connector and provides a sense signal having a first state when the first type PCI card is inserted in the PCI connector and having a second state when the second type PCI card is inserted in the PCI connector. Switching circuitry is coupled to the first and second power rails and is responsive to the sense signal being at the first state to provide the first voltage level on the voltage I/O pins. The switching circuitry is responsive to the sense signal being at the second state to provide the second voltage level on the voltage I/O pins.
In one embodiment, the PCI connector includes at least one sensing pin which is grounded when the first type PCI card is inserted in the PCI connector and is left open when the second type PCI card is inserted in the PCI connector. The sensing circuitry is coupled to the at least one sensing pin and is responsive to the at least one sensing pin being grounded to provide the sense signal at the first state. The sensing circuitry is responsive to the at least one sensing pin being left open to provide the sense signal at the second state.
In one embodiment, the first type PCI card operates up to a first frequency. The second type PCI card operates up to the first frequency when its I/O buffers operate at the first voltage level and operates up to a second frequency which is higher than the first frequency when its I/O buffers operate at the second voltage level. The PCI connector includes a sensing pin which is grounded when the PCI card inserted in the PCI connector is capable of operating up to the first frequency and is left open when the PCI card inserted in the PCI connector is capable of operating up to the second frequency which is higher than the first frequency. The sensing circuitry is coupled to the sensing pin and is responsive to the sensing pin being grounded to provide the sense signal at the first state. The sensing circuitry is responsive to the sensing pin being left open to provide the sense signal at the second state.
In one embodiment, the switching circuitry includes a system readable register for storing the state of the sense signal and a system writable register for providing a SETVIO signal for controlling the voltage level on the voltage I/O pins. The computer system includes a microprocessor for reading the system readable register and for writing the system writable register. A clock generator provides a clock signal which is controllable to have a frequency of either a first clock frequency or a second clock frequency. The microprocessor controls the clock generator to provide the clock signal at the first clock frequency. The microprocessor writes a first register state into the system writable register so that the system writable register provides the SETVIO signal at a first SETVIO state. The PCI connector is then powered on. The microprocessor reads the state of the system readable register. If the state of the system readable register indicates that the sense signal is at the first state, the PCI card is connected to the computer system and initialized. If the state of the system readable register indicates that the sense signal is at the second state, the microprocessor performs the following steps: power off the PCI connector; write a second register state into the system writable register so that the system writable register provides the SETVIO signal at a second SETVIO state; control the clock generator to provide the clock signal at the second clock frequency; power on the PCI connector; and connect the PCI card to the computer system and initialize the PCI card.
In one embodiment, the switching circuitry includes a first transistor having a gate, a second transistor having a gate, and control circuitry. The first transistor is coupled between the first power rail and the voltage I/O pins. The second transistor is coupled between the second power rail and the voltage I/O pins. The control circuitry receives the sense signal and controls the gate of the first transistor and the gate of the second transistor.
In one form of the previous embodiment, the computer system includes a hot-plug controller for controlling the first and second power rails and providing a gate bias signal for controlling the power-on of the PCI connector. The control circuitry is responsive to the gate bias signal for controlling the ga
Allan Scott P.
Babb Samuel M.
Meier Matthias
Etienne Ario
Hewlett--Packard Company
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