Adaptive microprocessor with dynamically reconfigurable microcod

Details Adaptive microprocessor with dynamically reconfigurable microcod Adaptive microprocessor with dynamically reconfigurable microcod

1997-08-21

2000-06-27

Ellis, Richard L.

Electrical computers and digital processing systems: processing

Processing control

Processing sequence control

G06F 924

Patent

active

060818883

ABSTRACT:
An adaptive computing device includes a processing unit connected to receive instructions for execution and a random access memory storing microcode for access by the processing unit to carry out steps for executing the instructions. The microcode is loaded into the random access memory from a source of microcodes tailored for efficient execution of the instructions received by the processing unit. The adaptive computing unit may further include control logic responsive to the instructions for execution to request a loading of microcode into the random access memory from the source of microcodes. The adaptive computing unit may further include control logic responsive to signals generated external to the computing unit to request loading of microcode into the random access memory from the source of microcodes.

REFERENCES:
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patent: 4346438 (1982-08-01), Potash et al.
patent: 5144242 (1992-09-01), Zilenga et al.
patent: 5237667 (1993-08-01), Murakami et al.
patent: 5274829 (1993-12-01), Hotta et al.

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