Adaptive level binary logic

Details Adaptive level binary logic Adaptive level binary logic

2005-07-05

2005-07-05

Le, Don (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S038000

Reexamination Certificate

active

06914451

ABSTRACT:
A digital logic interface circuit makes use of a logic signal representative of a logic signaling level definition, to determine the logic swing amplitude of signals from a given source adopting the same logic signaling level definition. The digital logic interface circuit generates a threshold level from the logic swing amplitude thus determined, and compares digital logic input signals against the threshold level in order to discriminate different logic levels in the digital logic input signals. The comparison result is provided as digital interface output signals adopting a predetermined logic signaling level definition for use by subsequent system sections. Examples of such representative signals are the digital input logic signals themselves, clock signals or line encoded signals. Other examples can be mode control signals or NRZ signals.

REFERENCES:
patent: 4091297 (1978-05-01), Stephens
patent: 4414512 (1983-11-01), Nelson
patent: 4775808 (1988-10-01), Trumpp
patent: 4866301 (1989-09-01), Smith
patent: 5003203 (1991-03-01), Win
patent: 5077496 (1991-12-01), Wolczanski
patent: 5159340 (1992-10-01), Smith
patent: 5166558 (1992-11-01), Ohsawa
patent: 5272394 (1993-12-01), Kirk et al.
patent: 5361006 (1994-11-01), Cooperman
patent: 5412259 (1995-05-01), Tokumaru
patent: 5440244 (1995-08-01), Richter et al.
patent: 5512853 (1996-04-01), Ueno et al.
patent: 5528172 (1996-06-01), Sundstrom
patent: 5717343 (1998-02-01), Kwong
patent: 5739704 (1998-04-01), Clark
patent: 5764097 (1998-06-01), Whitfield
patent: 5933026 (1999-08-01), Larsen et al.
patent: 5963053 (1999-10-01), Manohar
patent: 5969646 (1999-10-01), Cheng
patent: 6097215 (2000-08-01), Bialas
patent: 6212402 (2001-04-01), Rubbmark et al.
patent: 6242949 (2001-06-01), Wilford
patent: 6414525 (2002-07-01), Urakawa
patent: 6615301 (2003-09-01), Lee et al.
patent: 6806728 (2004-10-01), Nguyen et al.
patent: 199 30 183 (2000-10-01), None
patent: 0 036 950 (1981-10-01), None
patent: 0 051 343 (1982-05-01), None
patent: 0 481 530 (1992-04-01), None
patent: 0 844 736 (1998-05-01), None
patent: 1 041 719 (2000-04-01), None
patent: 1 011 196 (2000-06-01), None
patent: 63-287110 (1988-11-01), None
patent: 2000-36734 (2000-02-01), None
patent: WO 93/22837 (1993-11-01), None
patent: WO 98/28846 (1998-07-01), None
International Preliminary Examination Report, PCT/EP 01/12002, Apr. 13, 2004.

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