Adaptive issue queue for reduced power at high performance

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Reexamination Certificate

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07865747

ABSTRACT:
A method and structure of reducing power consumption in a microprocessor includes at least one storage structure in which the activity of the storage structure is dynamically measured and the size of the structure is controlled based on the activity. The storage structure includes a plurality of blocks, and the size of the structure is controlled in units of block size, based on activity measured in the blocks. An exemplary embodiment is an adaptive out-of-order queue.

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