Adaptive elasticity FIFO buffer

Details Adaptive elasticity FIFO buffer Adaptive elasticity FIFO buffer

1999-06-25

2003-03-04

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S052000, C710S057000, C370S407000, C370S514000

Reexamination Certificate

active

06529971

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of interfaces in information handling systems. More particularly, this invention relates to an adaptive elasticity First-in, first-out buffer in an interface of an information handling system.
BACKGROUND OF THE INVENTION
One of the key devices of any computer system is a place to store data. Computer systems have many different places where data can be stored. One common place for storing massive amounts of data is a disc drive. The most basic parts of a disc drive are a disc that is rotated and on which data is stored, an actuator that moves a transducer to various locations over the disc, and electrical circuitry that is used to write data to and read data from the disc through the transducer. Data is stored on one or both surfaces of the disc. The disc drive also includes circuitry for encoding data written to the disc and for decoding data retrieved from the disc. A microprocessor controls most of the operations of a disc drive including passing information, such as instructions or data, read from the disc back to a requesting computer and taking information from the requesting computer for writing to the disc.
The disc drive communicates with other devices in a computer system such as the requesting computer over an interface. The performance of the computer system depends in part on the bandwidth of the interface. The bandwidth determines the speed with which information signals may be transmitted over the interface. The performance of the computer system improves with increases in the bandwidth of the interface which results in a faster transfer of information signals between the devices in the computer system.
A fibre channel is one example of an interface with a high bandwidth. The fibre channel is a standardized interface described in AMERICAN NATIONAL STANDARDS INSTITUTE, FIBRE CHANNEL—PHYSICAL AND SIGNALING INTERFACE (FC-PH) (Rev 4.3 1994). The fibre channel is a point-to-point physical interface, transmission protocol, and signaling protocol of a serial link for the support of higher level transmission protocols for controlling the communication of information including data and instructions. One of the higher level protocols is described in AMERICAN NATIONAL STANDARDS INSTITUTE, FIBRE CHANNEL—ARBITRATED LOOP (FC-AL-2) (Rev 6.3 1998). Under the arbitrated loop protocol FC-AL-2, devices in the computer system are linked in series in a topology, specifically a data network loop called a fibre channel arbitrated loop. A fibre channel arbitrated loop is distinguished from an ordinary fibre channel in that each device, which is called a node in the loop, is connected to the loop through a node-loop port which arbitrates access to the loop under FC-AL-2. The node-loop port receives information signals from a preceding node through an incoming fibre and transmits information signals through an outgoing fibre to a succeeding node. Each fibre is a serial information transmission medium and may be a coaxial wire such as a coaxial copper conductor. The fibre may also comprise an optical fibre for some or all of its length.
The loop is closed to comprise a circular interface. When a transmitting node is in communication with a receiving node, information signals may pass through one or more intermediate nodes before reaching the receiving node. Each intermediate node receives and then transmits the information signals along to the succeeding node until they reach the receiving node. Transmissions are governed by a crystal in each node that feeds a clock signal source that determines the frequency at which the information signals are transmitted to the next node. Succeeding crystals are slightly different physically, and operate at different local temperatures such that nodes have slightly different transmission frequencies. An intermediate node will receive information signals at a receiving frequency and then transmit the information signals at a slightly different transmission frequency.
First-in, first-out (FIFO) buffers, also called elasticity FIFO buffers, are located in each port to accumulate and temporarily store received information at the receiving frequency and to provide the information to be transmitted at the transmission frequency. Information is stored in each elasticity FIFO buffer for a short period of time, and the amount of information stored at any one time is the latency of the loop. In some of the FIFO buffers the receiving frequency is greater than the transmission frequency such that these FIFO buffers operate at capacity and store a substantial amount of information. The accumulation of information in these FIFO buffers increases the latency of the loop which slows the transmission of information signals around the loop. There remains a need for elasticity FIFO buffers that reduce loop latency to support higher bandwidths across interfaces.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention, a method of operating a loop having at least two nodes includes monitoring deletions in an adaptive elasticity first-in, first-out buffer in each node, identifying each adaptive elasticity first-in, first-out buffer that is a “deleter”, and reducing a deletion threshold for each adaptive elasticity first-in, first-out buffer that is a deleter. A “deleter” is an adaptive elasticity first-in, first-out buffer for which information is deleted more often than information is inserted. According to another embodiment of the present invention a buffer includes an adaptive elasticity first-in, first-out buffer and a control circuit operatively configured to monitor deletions in the adaptive elasticity first-in, first-out buffer. The control circuit is operatively configured to determine if the adaptive elasticity first-in, first-out buffer is a deleter, and to reduce a deletion threshold for the adaptive elasticity first-in, first-out buffer if the adaptive elasticity first-in, first-out buffer is a deleter.
Advantageously, the method and the disc drive according to the embodiments of the present invention reduce loop latency by identifying adaptive elasticity first-in, first-out buffers that are deleters in a loop and then reducing the amount of information stored in the deleters by reducing the deletion threshold of the deleters. Advantageously, the reduction in loop latency speeds the transmission of information around the loop.


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IBM—Technical Disclosure Bulletin, vol. 37, No. 12, Dec. 1994, pp. 611-613.*
“Fibre Channel—Arbitrated Loop (FC-AL-2)—REV 6.3”, NCITS Working Draft Proposal, American National Standard for Information Technology, 146 p., (May 29, 1998).
“Fibre Channel—Physical and Signaling Interface (FC-PH)—REV 4.3”, Proposed Working Draft, American National Standard for Informations Systems, 478 p., (Jun. 1, 1994).

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