Adaptive associative memory comprising synapes of CMOS transisto

Details Adaptive associative memory comprising synapes of CMOS transisto Adaptive associative memory comprising synapes of CMOS transisto

1990-02-01

1991-07-23

Popek, Joseph A.

Static information storage and retrieval

Associative memories

Ferroelectric cell

364807, 364513, 307201, G11C 1500, G06G 700, G09C 0000, H03K 1908

Patent

active

050349180

ABSTRACT:
An associative memory for storing an n-bit stored vector in m different states comprises n first amplifiers connected between n input terminals and n output terminals, and m second amplifiers to feedback to the input side the designated states of the stored vectors. Synapses of the storing unit store the above mentioned stored vectors in the a binary 1 or 0; synapses of the label units couple the respective intersections between the input and output lines of the second amplifiers; and synapses of the vector units couple the intersections between the output lines of the first amplifiers and the input lines of the second amplifiers. According to the present invention, the outputs of the amplifiers are stabilized, so that stabilized operations can be obtained.

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H. P. Graf et al., "VSLI Implementation of a Neural Network Model", IEEE Computer, vol. 21, Mar. 1988, pp.
Daud et al., "Neural Network Based on Feed-Forward High Density Associative Memory", Digest of Int'l Electron Devices Meeting, Dec. 1987, pp. 107-110.

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