Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
1997-04-04
2001-02-20
Donaghue, Larry D. (Department: 2783)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S120000, C710S120000, C713S401000
Reexamination Certificate
active
06192426
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to communication interfaces of the type used to connect a digital computer to peripheral devices, and more particularly to adapters that interconnect single-ended and differential buses over which the digital computer and peripheral devices communicate.
BACKGROUND OF THE INVENTION
A known type of bus adapters interconnect SCSI buses, e.g., single-ended SCSI buses with differential SCSI buses. SCSI buses obtain their name by complying with the Small Computer system Interface (“SCSI”) standards of the American National Standards Institute, New York, N.Y., USA, designated ANSI X3T9.2/86-109, Rev. 10H and X3T9/89-042.
Generally speaking, the SCSI standards specify the electrical, mechanical and logical characteristics of the SCSI bus, which is an eight-bit parallel input/output (I/O) bus. A SCSI bus can be used for coupling physically small computers with each other and with peripheral devices; up to a total of eight devices (including the computers) can be connected to the bus. The peripheral devices can include, for example, disk drives, tape drives, printers, compact disk read-only memories (“CD-ROM's”), and scanners.
The SCSI standards specify a distributive bus protocol, which facilitates information transfers between devices connected to the bus. Generally speaking, the bus protocol refers to the host computers on the bus as “initiators” and the peripheral devices on the bus as “targets”. The initiators are capable of initiating operations on the bus, and the targets are capable of responding to the initiators to perform operations. The SCSI standards also specify an arbitration system, under which control of the bus is awarded to the device on the bus having the highest priority level of those contending for control.
The bus protocol includes an addressing scheme for identifying the initiators and targets, and specifies control signals used to control operation of the SCSI bus, and to establish communication links between the initiators and targets for information transfers on the bus.
The control signals are asserted over specified “lines” of the SCSI bus, and include, among others, the following:
1) BUSY or “BSY” (which, when asserted, indicates that the bus is in use, i.e., busy or not “free”),
2) REQUEST or “REQ” (which is used by a target to indicate a request for a data information transfer between the initiator and the target, i.e., when asserted by a target, the initiator is to accept data from the bus during an information-in-phase, or place data on the bus during an information-out-phase),
3) ACKNOWLEDGE or “ACK” (which, when asserted, indicates that data information sent over the bus is valid, i.e., when asserted, the initiator has placed data information on the bus during an information-out-phase, or has accepted data from the bus during an information-in-phase).
In addition to the control lines, the initiators and targets use a bi-directional, eight-bit, parallel DATA bus (i.e., DATA lines of the SCSI bus) to transfer data information. The DATA lines are also used to transfer SCSI ID codes that uniquely identify the devices on the SCSI bus, and specify their relative priority during arbitration.
SCSI buses can be either “differential” or “single-ended”. A single-ended configuration uses a single conductor or cable of up to six meters in length for each signal line, and the voltage level on that conductor determines the assertion or deassertion of that line. Accordingly, each device connected to a single-ended bus typically has, for each signal line, a driver with a single output terminal connected to that conductor, and a receiver with a single input terminal connected to that conductor.
A differential configuration uses a pair of conductors or cables of up to 25 meters in length for each signal line, and the voltage difference between those conductors (referenced to ground) determines the assertion or deassertion of that line. Accordingly, each device connected to a differential bus typically has, for each signal line, a driver with a pair of output terminals connected to the differential conductors, and a receiver with a pair of input terminals connected to the differential conductors (plus, in each case, a ground terminal conducted to a ground path).
While known adapters for interconnecting single-ended and differential SCSI buses have been generally suitable for their intended purposes, they can experience problems during operation, such as the so-called “wired-or glitch.” This problem will be discussed in the context of the BUSY line, thus the name “BUSY glitch.”
To understand the BUSY glitch, it is necessary to consider normal operation of the SCSI bus, when, for example, two or more devices attempt to gain access to the SCSI bus at the same time by arbitrating for its control. The devices do so by asserting the BUSY line of the bus. In accordance with the SCSI standards, which specify negative logic, the contending devices drive the BUSY line of a single-ended bus to a low voltage state (“LOW”), or drive the BSY
+
conductor more positive than the BSY
−
conductor of the BUSY line of a differential bus, and assert selected other lines indicating the respective priority levels.
Since only one device can gain control of the SCSI bus at a time, the devices “losing” the arbitration will deassert the BUSY line, and thus drop off the bus. When they deassert the BUSY line, a current differential arises, which results in a voltage wavefront traveling the length of the line. When the wavefront reaches the other end, it is reflected back. This wavefront is called a BUSY glitch.
The wavefront is essentially a voltage pulse or “step”. The voltage step can be of sufficient magnitude to cause a false high voltage state (“HIGH”) on the BUSY line, i.e., using the negative logic of the SCSI standards, the line will falsely appear to be deasserted at any point along the line until the reflection reaches that point. The false or invalid deassertion of the BUSY signal can “fool” other devices on the bus into “believing” that the bus is free when it is not, thereby adversely affecting bus operation.
The wired-or glitch is more fully described in “SCSI BUS SIGNAL QUALITY—PROBLEMS AND SOLUTIONS”, by Kurt Chan, Hewlett-Packard, Reprinted for Zadian Software, August, 1990.
In order to avoid the adverse effects of the BUSY glitch, the SCSI standards contemplate that the devices on the SCSI bus should wait before they again seek control of the SCSI bus for a length of time after first detecting a BUSY glitch equal to that required for the waveform to make a round trip on the bus, which depends on the length of the bus.
The SCSI specifications specify also that the maximum propagation time for the BUSY glitch is 400 nanoseconds. Normally, for the most basic of SCSI bus system configurations, this maximum time specification to avoid BUSY glitches presents no difficulty to SCSI-device designers. For example, if the SCSI bus is 25 meters long (i.e., the maximum differential bus length under the standards), a glitch typically will travel down and back the length of the bus in 250 nanoseconds, which is well under the requirement.
However, introduction of an adapter between a single-ended and a differential bus can change the picture. If the differential bus is 25 meters in length, and the single-ended bus is three meters long, the round trip time of travel is 280 nanoseconds. The adapter adds typically a 50 nanosecond delay in each direction, yielding a total which is just barely under the 400 nanosecond limit. If there are additional delays, for example, due to connectors and other components of the system, the total delay would typically exceed the limit.
The situation is even more extreme when two adapters are used, e.g., each connected to a 25-meter differential bus and the two adapters linked by a three-meter single-ended bus. The resulting delay would typically be significantly in excess of the limit under the SCSI standards.
It would be desirable to prevent the adapter from transferring the BUSY glitch from one bus to
Godin Paul L.
Kando Robert R.
Compaq Corporation
Donaghue Larry D.
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