Active pull-down circuit for ECL using a capacitive coupled circ

Details Active pull-down circuit for ECL using a capacitive coupled circ Active pull-down circuit for ECL using a capacitive coupled circ

1995-11-13

1998-04-07

Westin, Edward P.

Electronic digital logic circuitry

Accelerating switching

Bipolar transistor

326126, H03K 19013

Patent

active

057368660

ABSTRACT:
Fast fall time for ECL logic waveforms are produced by use of a circuit, which very quickly transfers charge from the ECL output load capacitance into a temporary holding capacitor. The charge transferred onto the temporary holding capacitor may then be removed at a leisurely pace. The circuit includes a pulldown transistor, and a control circuit that selectively turns the pulldown transistor on, if the ECL output will be low, or off, if the ECL output will be high. The control circuit includes an emitter-follower transistor which follows the differential ECL collector node that changes voltage inversely to the desired final ECL output. A diode is connected to the emitter-follower transistor's emitter so that the diode output is two diode drops below the ECL collector node inverse in polarity to the output. The diode drives the base of the pulldown transistor, so that the base of the pulldown transistor remains static until the inputs to the circuit change.

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Kuroda, et al., "Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting drive capacity", Symp. VLSI Circuits Dig. Tech. Papers, May 1993, pp. 29-30.
C.T. Chuang et al. "High-Speed low power ECL Circuit with ac-coupled self-biased dynamic current source and active-pull-down emitter-follower stage", IEEE J. Solid-State Circuits, vol. 27, No. 8, pp. 1207-1210, Aug. 1992.
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