Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
1997-10-31
2001-07-17
Whitehead, Jr., Carl (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S059000
Reexamination Certificate
active
06262438
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit structure of a pixel region of an active matrix type display device using thin-film transistors, and particularly to a structure of an auxiliary capacitor.
2. Description of the Related Art
In recent years, a technique for manufacturing thin-film transistors (TFT) on an inexpensive glass substrate has been rapidly developed. The reason is that the demand for active matrix type liquid crystal display devices has been increased.
In the active matrix type liquid crystal display device, thin-film transistors are respectively arranged for each of several tens to several million pixels arranged in matrix form to control electrical charge going in and out of the respective pixel electrodes by a switching function of the thin-film transistor.
A liquid crystal is placed between the respective pixel electrodes and opposing electrodes so that a kind of capacitor is formed. Accordingly, if going in and out of electrical charge to the capacitor is controlled by the thin-film transistor, the electro-optical characteristics of the liquid crystal are changed so that a picture image can be displayed by controlling light transmitting through a liquid crystal panel.
The capacitor having such a structure has a problem that since a hold voltage of the capacitor is gradually decreased by a leak current, the electro-optical characteristics of the liquid crystal is changed so that the contrast of display of a picture image is deteriorated.
Then, such a structure becomes common that another capacitor referred to as an auxiliary capacitor is disposed in series with the capacitor constituted by the liquid crystal so that electrical charge lost through a leak or the like is supplied to the capacitor constituted by the liquid crystal.
FIG. 4
is a circuit diagram showing a conventional active matrix type liquid crystal display device. The active matrix type liquid crystal display circuit is roughly divided into three parts. That is, the circuit is divided into a gate driver circuit
62
for driving gate wiring lines (scan wiring lines)
64
, a data driver circuit
61
for driving data wiring lines (source wiring lines, signal wiring lines), and an active matrix circuit
63
in which pixels are provided. Among them, the data driver circuit
61
and the gate driver circuit
62
are generally referred to as a peripheral circuit.
In the active matrix circuit
63
, a number of gate wiring lines
64
and data wiring lines
65
are provided so as to cross with each other, and pixel electrodes
67
are provided at each intersection point. Further, a switching element (thin-film transistor)
66
for controlling electrical charge going in and out of the pixel electrode is provided. Still further, as described above, in order to suppress the change of a voltage of a pixel due to the leak current, an auxiliary capacitor
68
is provided in parallel with a capacitor of the pixel (FIG.
4
).
Various methods of forming an auxiliary capacitor have been proposed, and the most typical structure of the auxiliary capacitor uses the overlap of an active layer (semiconductor layer) of a thin-film transistor and a gate wiring line.
FIGS. 3A
to
3
E show the state of a cross section of an active matrix type circuit using top-gate type thin-film transistors, while explaining the manufacturing steps. An intrinsic active layer
42
is formed on a substrate
41
, and is selectively doped with N-type or P-type impurities to form a conductive region
44
. Further, a gate insulating film
43
is formed so as to cover the active layer, and gate wiring lines
45
and
46
are formed (FIG.
3
A).
In general, the gate wiring lines
45
and
46
use wiring lines in rows different from each other. In the pixel shown in the drawing, the gate wiring line
45
functions as a gate electrode of the thin-film transistor, and the gate wiring
46
functions as an electrode of an auxiliary capacitor
49
. The reason why the wiring lines in the different rows are used is that if the gate wiring lines
45
and
46
are those in the same row, parasitic capacitance between a drain and the gate electrode of the thin-film transistor becomes extremely large, so that it constitutes an obstacle to a switching function. In the drawing, the gate wiring
46
is for constituting the auxiliary capacitor, and another wiring line for only increasing an aperture ratio is not generally formed.
Next, impurities having the same conductivity as the conductive region
44
are implanted while using the gate electrode as a mask so that a source
47
and a drain
48
are formed in a self-alignment manner. In this way, the auxiliary capacitor
49
is formed between the gate wiring line
46
, and the conductive region
44
and the drain
48
(FIG.
3
B).
Thereafter, a first interlayer insulator including a silicon nitride layer
50
as a passivation film and a layer
51
of a material suitable for flattening such as polyimide, is formed and is etched so that a contact hole reaching to the source
47
is formed. Then, a data wiring line
52
is provided (FIG.
3
C).
Since the conductivity of the thin-film transistor is varied by irradiation of light, in order to prevent the variation, a coating film (black matrix)
54
having light shielding properties is overlapped on the thin-film transistor. Further, in order to prevent mixing of colors and degrees of brightness between pixels and to prevent poor display due to the disturbance of an electric field at boundary portions of the pixels, the above light shielding coating film is also formed between pixels. Thus, the light shielding coating film has a matrix shape so that it is called a black matrix (BM). The BM
54
is formed on a second interlayer insulator
53
(FIG.
3
D).
Thereafter, a third interlayer insulator
55
is formed, and is etched to form a contact hole reaching to the drain
48
(or conductive region
44
). Further, a pixel electrode
56
is formed of a transparent conductive coating film. If the BM is formed of an insulating material, the third interlayer insulator
55
is not necessary (FIG.
3
E).
Among the above steps, main steps are enumerated as follows.
A forming step of the active layer
42
B selective doping step for forming the conductive region
44
C forming step of the gate insulating film
43
D forming step of the gate wiring lines
45
and
46
E self-alignment doping step for forming the source
47
and the drain
48
F forming step of the first interlayer insulators
50
and
51
G forming step of the contact hole
H forming step of the data wiring line
52
I forming step of the second interlayer insulator
53
J forming step of the black matrix
54
K forming step of the third interlayer insulator
55
L forming step of the contact hole
M forming step of the pixel electrode
56
Among the above steps, eight steps A, B, D, G, H, J, L and M are accompanied by a photolithography step.
FIGS. 10A
to
10
D show the state of a cross section of an active matrix circuit using bottom-gate type thin-film transistors while explaining the manufacturing steps. A gate wiring line
172
and a capacitor wiring line
173
are formed on a substrate
171
. The capacitor wiring line
173
may also serves as a gate wiring line, and in this case, an opening region can be made large as compared with the case where the capacitor wiring line is especially provided.
In the case where the capacitor wiring line
173
is used as the gate wiring line, the wiring line of a row different from the gate wiring line
172
is used. If the gate wiring line
172
and the wiring line
173
are in the same row, parasitic capacitance between the drain and the gate electrode of the thin-film transistor becomes extremely large, so that switching is hindered.
Incidentally, in the case where the capacitor wiring line
173
serves also as the gate wiring line, there is also such a defect that the parasitic capacitance of the wiring line becomes large so that the operation speed slows down and the signal shape becomes dull.
Next, a gate insulating film
Takemura Yasuhiko
Yamazaki Shunpei
Fish & Richardson PC
Jr. Carl Whitehead
Semiconductor Energy Laboratory Co,. Ltd.
Vockrodt Jeff
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