Active matrix display device having multiple gate electrode...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S066000, C257S365000, C257S368000

Reexamination Certificate

active

06184559

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device using a thin-film semiconductor. More particularly, the present invention relates to a structure of a gate electrode in an insulated gate type transistor.
2. Description of the Related Art
As a semiconductor device using a thin-film semiconductor, attention is attached to a thin-film transistor (TFT). Especially, in recent years, a TFT capable of performing high speed operation by using a crystalline silicon film (for example, polysilicon film), has been put into a practical use.
Although a thin-film transistor using a crystalline silicon film as an active layer has a high mobility (field effect mobility), it has such a defect that an off-state current (current flowing when the TFT is in an off-state) is large. Further, the thin-film transistor has a problem that when the mobility becomes high, a withstand voltage becomes low so that deterioration becomes noticeable.
As means for solving such problems, there is known a technique disclosed in Japanese Examined Patent Publication No. Hei 5-44195. According to this technique, a thin-film transistor is made equivalently to have such a structure (also called as a multi-gate structure) that a plurality of thin-film transistors are connected in series to each other, so that an applied voltage is distributed to each of the plurality of thin-film transistors.
FIG. 4
is a structural view showing an active layer and a gate electrode of a thin-film transistor manufactured by using the technique disclosed in the above publication. In
FIG. 4
, reference numeral
401
denotes a source region, and
402
denotes a drain region. Gate electrodes
403
to
406
are formed above the active layer through a gate insulating film (not shown). At this time, the gate electrodes
403
to
406
are formed integrally so that they are connected electrically.
Channel forming regions
407
to
410
are formed just under the gate electrodes
403
to
406
into shapes corresponding to those of the gate electrodes
403
to
406
. It is characterized in that the structure is substantially composed of a plurality of thin-film transistors commonly connected in series.
However, according to experiments carried out by the present inventors by using the TFTs having the structure as shown in
FIG. 4
, it has been found that the thin-film transistor closest to the drain region
402
deteriorates most intensely. Also, it has been found that when a high voltage is applied between the source and drain, breakdown or deterioration proceeds sequentially from a transistor at the side close to the drain region.
According to another experiment, it has been found that in a TFT constituted by an active layer with a wide channel width, the vicinity of a center of an active layer (vicinity of the center in the channel width direction) deteriorates most intensely.
SUMMARY OF THE INVENTION
An object of the present invention is to prevent breakdown or deterioration of a semiconductor device equivalently having such a structure that a plurality of semiconductor devices are connected in series to each other, by relieving the concentration of electric field on one of the plurality of semiconductor devices close to a drain side.
Another object of the present invention is to prevent deterioration from occurring at a center portion of an active layer, by suppressing an electric current flowing through the vicinity of the center of the active layer.
According to a structure of a first invention, a semiconductor device is comprised of: an active layer including source and drain regions and channel forming regions; a gate insulating film; and a gate electrode overlapping with the active layer through the gate insulating film, and is characterized in that the gate electrode has a structure which can be regarded substantially as a plurality of gate electrodes integrally formed, and that among said plurality of gate electrodes, the one closest to the drain region has the narrowest width.
In the above structure, the fact that the width of the gate electrode closest to the drain region is the narrowest implies the fact that the width of the channel forming region (in other words, channel length) formed just under the gate electrode is the narrowest.
According to another structure of the first invention, a semiconductor device is comprised of: an active layer including source and drain regions and channel forming regions; a gate insulating film; and a gate electrode overlapping with the active layer through the gate insulating film, and is characterized in that the gate electrode has a structure which can be regarded substantially as a plurality of gate electrodes integrally formed, and that the widths of the plurality of gate electrodes sequentially become narrower as it comes to close to the drain region.
Also in this case, the above feature implies that the widths of the channel forming regions sequentially become narrower as it comes close to the drain region.
These structures are intended to decrease the resistance component of the channel forming region by narrowing the width of the gate electrode close to the drain region, that is, the width of the channel forming region, so that a voltage applied to the channel forming region is lowered.
According to a structure of a second invention, a semiconductor device is comprised of: an active layer including source and drain regions and channel forming regions; a gate insulating film; and a gate electrode overlapping with said active layer through said gate insulating film, and is characterized in that a width of the gate electrode is varied in a channel width direction of the active layer.
According to another structure of the second invention, a semiconductor device is comprised of: an active layer including source and drain regions and channel forming regions; a gate insulating film; and a gate electrode overlapping with said active layer through said gate insulating film, and is characterized in that a width of the gate electrode becomes wider as it comes close to a center portion of the active layer from an end of the active layer in a channel width direction.
The above two structures are intended to suppress the amount of flowing current by widening the width of the gate electrode at the vicinity of the center of the active layer so that the channel forming region is widened and the resistance component is increased at the vicinity of the center of the active layer.
As described above, the gist of the present invention is to intentionally change the width of the channel forming region in the active layer, so that the resistance component of the channel forming region is set to have a desired characteristic. That is, the present invention is a technique to distribute a voltage applied to the channel forming region and to control the amount of current flowing through a specified portion of the channel forming region.


REFERENCES:
patent: 5331192 (1994-07-01), Kudoh
patent: 5528056 (1996-06-01), Shimada et al.
patent: 5569936 (1996-10-01), Zhang et al.
patent: 5751033 (1998-05-01), Miya
patent: 5777360 (1998-07-01), Rostoker et al.
patent: 5812231 (1998-09-01), Kochi et al.
patent: 5821564 (1998-10-01), Wu et al.
patent: 5929464 (1999-07-01), Yamazaki et al.
patent: 58-171860 (1983-10-01), None

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