Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2011-01-04
2011-01-04
Cho, James (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S033000
Reexamination Certificate
active
07863929
ABSTRACT:
The invention discloses an active back-end termination circuit, which comprises a first resistor, a first transistor, a second resistor, and a second transistor. The first resistor and the first transistor are connected in series for forming a first impendence unit. A first source of the first transistor is connected to a working voltage with VTT. The second resistor and the second transistor are connected in series for forming a second impendence unit. A second gate and a second drain of the second transistor are connected to the working voltage with VTT. Wherein, the first impendence unit and the second impendence unit are connected in parallel. The first transistor or the second transistor is switched on through a power source, and the first transistor and the second transistor change the impedance actively for matching a load according to the voltage source.
REFERENCES:
patent: 6307401 (2001-10-01), Bridgewater, Jr.
patent: 6667661 (2003-12-01), Liu et al.
patent: 7301365 (2007-11-01), Chan
patent: 7312662 (2007-12-01), Roo et al.
Hsu Yu-Hao
Kao Min-Sheng
Wu Jen-Ming
Cho James
National Tsing Hua University
Tolpin Thomas W.
Tolpin & Partners, PC
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