Active address content addressable memory

Details Active address content addressable memory Active address content addressable memory

2005-07-05

2005-07-05

McLean-Mayo, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S108000

Reexamination Certificate

active

06915395

ABSTRACT:
A present invention provides a system and method for avoiding memory hazards in a multi-threaded CPU which shares an L-1 data cache. The system includes a CPU and an AACAM. The AACAM is capable of copying memory addresses from the two or more threads being processed by the CPU. The method provides for comparing the AACAM memory address with the active threads to avoid memory hazards by thread switching before the memory hazard occurs.

REFERENCES:
patent: 5761476 (1998-06-01), Martell
patent: 6170051 (2001-01-01), Dowling
patent: 6298431 (2001-10-01), Gottlieb
patent: 6341341 (2002-01-01), Grummon et al.
patent: 2321544 (1998-07-01), None
patent: WO 99/31594 (1999-06-01), None
S. Wallace et al, “Threaded Multiple Path Execution”,Annual International Symposium on Computer Architecture, ISCA 1998, IEEE Comp. Soc., pp 238-249.

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