Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2005-01-11
2005-01-11
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S233500, C365S230030
Reexamination Certificate
active
06842392
ABSTRACT:
To provide a technique for reducing the power consumption associated with word line activation in a semiconductor memory device. The semiconductor memory device is provided with a word line activation controller for controlling word line activation. Where consecutive operation cycles use multiple-bit addresses that include an identical row address, the word line activation controller can maintain an the activated state of a word line activated during an initial cycle of the consecutive cycles, without deactivating it until a final cycle of the consecutive cycles. If a refresh operation is to be performed during a cycle among the consecutive cycles after the initial cycle, the word line activation controller can deactivate the activated word line prior to performing the refresh operation.
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Mizugaki Koichi
Otsuka Eitaro
Hoang Huan
Oliff & Berridg,e PLC
Seiko Epson Corporation
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