Acquisition process in a phase-locked-loop by switched phase mea

Details Acquisition process in a phase-locked-loop by switched phase mea Acquisition process in a phase-locked-loop by switched phase mea

1975-06-30

1976-09-07

Heyman, John S.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 17, H03B 304

Patent

active

039796914

ABSTRACT:
A phase-locked-loop circuit configuration is described which eliminates the statistical nature of the acquisition process, thereby improving or decreasing the acquisition or lock-up-time of the loop. The circuit configuration is such that given an input signal, that occurs at time T.sub.0, the loop error signal is reduced to a level where the lock-up-time is substantially reduced and predictable to a degree of certainty heretofore unattainable. In addition, by eliminating the statistical nature of the acquisition process, lock-up-time becomes a function of controllable system parameters, such as bandwidth, gain and circuit time constants.

REFERENCES:
patent: 3639852 (1972-02-01), Boyer
patent: 3795870 (1974-03-01), Sanders
patent: 3810036 (1974-05-01), Bloedorn

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