Accuracy on-chip clock generator for multi-clock driven...

Details Accuracy on-chip clock generator for multi-clock driven... Accuracy on-chip clock generator for multi-clock driven...

2011-06-14

2011-06-14

Pascal, Robert (Department: 2817)

Demodulators

Frequency modulation demodulator

Having specific distortion, noise or other interference...

C455S135000, C455S226300, C455S296000, C375S346000

Reexamination Certificate

active

07961040

ABSTRACT:
A mixed-signal chip is described. The mixed-signal chip comprises a first portion of analog circuit and second portion of digital circuit, an on-chip precision oscillator residing on the first analog portion, the precision oscillator has a precision frequency; a first on-chip non-precision tunable oscillator from a first clock domain residing on the first analog portion, the first non-precision tunable oscillator has a first adjustable frequency; a noise detector for detecting a first noise in the first clock domain; a frequency adjusting register for storing a first desired frequency value of the first on-chip non-precision tunable oscillator, wherein the first desired frequency value is determined based on the first detected noise; a control circuit for adjusting the adjustable frequency of the first non-precision tunable oscillator to the first desired frequency value by using the precision frequency of the on-chip precision oscillator as a reference.

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patent: 7250825 (2007-07-01), Wilson et al.
patent: 7515920 (2009-04-01), Ishihara
patent: 7812683 (2010-10-01), Sutardja
patent: 2002/0127967 (2002-09-01), Najafi
patent: 101072029 (2007-11-01), None
Cadence, White Paper, Substrate Noise Analysis of Mixed-Signal ICs, May 2001.
Sirowy, et al.; Clock-Frequency Assignment for Multiple Clock Domain Systems-on-a-Chip, 2007.

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