Accessing semiconductor memory device according to an...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S191000, C365S207000

Reexamination Certificate

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07623406

ABSTRACT:
A semiconductor memory device includes a memory cell array, a decoder, and an access control unit. The decoder generates a word line voltage according to an address for a plurality of memory cells in the memory cell array. The access control unit controls access to the plurality of memory cells according to the word line voltage and additional access information separate from the address.

REFERENCES:
patent: 6675256 (2004-01-01), Harrand
patent: 7165168 (2007-01-01), McDonald
patent: 7227791 (2007-06-01), Park
patent: 2002/0080677 (2002-06-01), Watanabe et al.
patent: 2006/0013057 (2006-01-01), Park
patent: 2006/0092712 (2006-05-01), Park
U.S. Appl. No. 11/700,780 to Gi-Ho Park.
Korean Patent Publication No. 1996-25764 having Publication date of Jul. 20, 1996 (w/ English Abstract page).
Korean Patent Publication No. 2000-0009468 having Publication date of Jun. 5, 2000 (w/ English Abstract page).
Korean Patent Publication No. 1020010026006 having Publication date of Apr. 6, 2001 (w/ English Abstract page).
Japanese Patent Publication No. 07-147096 having Publication date of Jun. 6, 1995 (w/ English Abstract page).

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