Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2011-01-18
2011-01-18
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000
Reexamination Certificate
active
07872929
ABSTRACT:
Techniques for accessing a memory cell in a memory circuit include: receiving a request to access a selected memory cell in the memory circuit; determining whether the selected memory cell corresponds to a normal memory cell or a weak memory cell in the memory circuit; accessing the selected memory cell using a first set of control parameters when the selected memory cell corresponds to a normal memory cell, wherein the selected memory cell provides correct data under prescribed operating specifications when accessed using the first set of control parameters; and accessing the selected memory cell using a second set of control parameters when the selected memory cell corresponds to a weak memory cell, wherein the selected memory cell provides correct data under the prescribed operating specifications when accessed using the second set of control parameters and provides incorrect data under the prescribed operating specifications when accessed using the first set of control parameters.
REFERENCES:
patent: 6104638 (2000-08-01), Larner et al.
patent: 7283395 (2007-10-01), Ziegelmayer
Dell Richard Bruce
Kohler Ross A.
McPartland Richard J.
Werner Wayne E.
LSI Corporation
Nguyen Tan T.
Ryan & Mason & Lewis, LLP
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