Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-12-13
2005-12-13
Kim, Matthew (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C365S049130
Reexamination Certificate
active
06976126
ABSTRACT:
The present invention provides an apparatus and method for accessing data values in a cache and in particular accessing data values in an ‘n’ way set associative cache. A data processing apparatus is provided comprising an ‘n’ way set-associative cache, each cache way having a plurality of entries for storing a corresponding plurality of data values. A cache controller is provided which is operable on receipt of an access request for a data value to determine whether that data value is accessible within the cache, the cache comprising cache access logic operable under the control of the cache controller to determine whether a data value the subject of an access request is accessible in one of the cache ways. Also provided is a way lookup cache arranged to store an indication of the cache way in which a number of the plurality of data values stored in the cache are accessible. The cache controller is operable, when an access request for a data value specifies a non-sequential access, to reference the way lookup cache to determine whether that data value is identified in the way lookup cache and, if so, the cache controller being further operable to suppress the operation of the cache access logic and to cause that data value to be accessed. The provision of a way lookup cache enables the power consumption of the cache to be reduced by enabling the operation of the cache access logic to be suppressed.
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Clegg Christopher Michael
Grisenthwaite Richard Roy
ARM Limited
Choi Woo H.
Kim Matthew
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