Static information storage and retrieval – Read/write circuit – Parallel read/write
Reexamination Certificate
2006-05-02
2006-05-02
Peikari, B. James (Department: 2189)
Static information storage and retrieval
Read/write circuit
Parallel read/write
C365S189040, C365S230030, C710S020000, C710S021000, C711S150000, C711S151000, C711S168000, C711S005000, C711S105000
Reexamination Certificate
active
07038964
ABSTRACT:
Access of multiple data processing circuits to a common memory having several banks is managed, the memory being connected to one or several circuits for processing ordinary data and to a circuit for processing priority data. A method of managing access includes producing an access demand of a circuit for processing ordinary data to a bank of the memory, starting the realization of the demanded access, subsequently producing an access demand of the circuit for processing priority data to another bank of the memory, preparing, during the realization of the access demanded by the ordinary data processing circuits, the other bank of the memory, and interrupting the access in the course of realization as soon as said preparation is completed.
REFERENCES:
patent: 5058051 (1991-10-01), Brooks
patent: 5594876 (1997-01-01), Getzlaff et al.
patent: 5659715 (1997-08-01), Wu et al.
patent: 5959929 (1999-09-01), Cowles et al.
patent: 1191445 (2002-03-01), None
patent: 2381622 (2003-05-01), None
De Perthuis Hugues
Gourbilleau Thierry
Mutz Stéphane
Koninklijke Philips Electronics , N.V.
Peikari B. James
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