Access method and architecture of non-volatile random access...

Details Access method and architecture of non-volatile random access... Access method and architecture of non-volatile random access...

2006-08-15

2006-08-15

McLean-Mayo, Kimberly N. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

C711S154000, C711S103000

Reexamination Certificate

active

07093060

ABSTRACT:
The present invention provides a method as well as an architecture for a host equipped with a CPU-level processing capability to access a Non-Volatile Random Access Memory (NVRAM) and at least a controller via a simple 3-wire/4-wire mechanism. The data stored in the NVRAM are shared with the controller and the host. More importantly, a multi-access mechanism further having a pragmatic bit determines the pragmatic bit for either the controller or the NVRAM. With the method of the present invention, computer system resources can be fully utilized, and thereby, peripheral devices can be easily added to the system in an inexpensive and highly efficient way.

REFERENCES:
patent: 6851025 (2005-02-01), Park
patent: 2003/0174547 (2003-09-01), Nakata et al.

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