Access collision within a multiport memory

Details Access collision within a multiport memory Access collision within a multiport memory

2007-11-16

2009-10-20

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S154000, C365S233110

Reexamination Certificate

active

07606108

ABSTRACT:
A multiport memory2is provided with control circuitry14which detects signal values indicative of concurrent write and read accesses via respective bit lines of a plurality of data access ports to a common row of bit cells. When such signals are detected, an override signal is generated and supplied to override circuitry34, 36, 38, 40, 42, 44. The override circuitry is responsive to the override signal to drive one or more bit values being written to respective bit cells via their associated bit lines onto associated bit lines of other of a plurality of data access supports that are concurrently enabled for access to their bit cells. Thus, write data is also written onto the bit lines associated with a port performing a concurrent read operation.

REFERENCES:
patent: 6539455 (2003-03-01), Khanna et al.

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