Accelerated deserialized boot implementation for a...

Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program

Reexamination Certificate

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C713S001000, C709S201000

Reexamination Certificate

active

07836293

ABSTRACT:
An accelerated boot process for a multiprocessor system and system components for use with the process are disclosed. Each processor caches at least one compressed system image in local nonvolatile memory. The processors boot concurrently, each using a local image. After a master processor is booted, the other processors verify with the master that each has booted a correct image version. Various redundancy and fallback features are described, which guarantee that all cards can boot and operate even if the preferred local system image contains a defect.

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patent: 2008/0184038 (2008-07-01), Fitton

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