Absolute duty cycle measurement

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C702S057000, C702S085000, C702S089000, C327S175000, C327S176000

Reexamination Certificate

active

07904264

ABSTRACT:
A mechanism for measuring the absolute duty cycle of a signal is provided. A non-inverted path from a signal source is selected and various DCC circuit setting indices are cycled through until a divider, coupled to the output of the DCC circuit, fails. A first minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of the failure. An inverted path from the signal source is selected and the various DCC circuit setting indices are cycled through again until the divider fails. A second minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of this second failure. The duty cycle is then calculated based on a difference of the first and second minimum pulse width values.

REFERENCES:
patent: 4552118 (1985-11-01), Fukaya
patent: 4675597 (1987-06-01), Hernandez
patent: 4814872 (1989-03-01), Ivie
patent: 4859944 (1989-08-01), Webb
patent: 4962431 (1990-10-01), Imakawa et al.
patent: 5367200 (1994-11-01), Leonida
patent: 5789723 (1998-08-01), Hirst
patent: 5933399 (1999-08-01), Kim
patent: 5987238 (1999-11-01), Chen
patent: 6060922 (2000-05-01), Chow et al.
patent: 6084452 (2000-07-01), Drost et al.
patent: 6150847 (2000-11-01), Lu
patent: 6240526 (2001-05-01), Petivan et al.
patent: 6260176 (2001-07-01), Chen
patent: 6664834 (2003-12-01), Nair et al.
patent: 6700530 (2004-03-01), Nilsson
patent: 6798266 (2004-09-01), Vu et al.
patent: 6809678 (2004-10-01), Vera et al.
patent: 6842399 (2005-01-01), Harrison
patent: 6847244 (2005-01-01), Pillay et al.
patent: 6961403 (2005-11-01), Austin et al.
patent: 7002358 (2006-02-01), Wyatt
patent: 7042257 (2006-05-01), Wang
patent: 7058120 (2006-06-01), Lu et al.
patent: 7227809 (2007-06-01), Kwak
patent: 7350095 (2008-03-01), Boerstler et al.
patent: 7369001 (2008-05-01), Yu
patent: 7551463 (2009-06-01), Ros et al.
patent: 7617059 (2009-11-01), Boerstler et al.
patent: 7816900 (2010-10-01), Brown
patent: 2002/0097035 (2002-07-01), Atallah et al.
patent: 2004/0183578 (2004-09-01), Chong et al.
patent: 2005/0225314 (2005-10-01), Belleau
patent: 2006/0103367 (2006-05-01), Boerstler et al.
patent: 2006/0103441 (2006-05-01), Carpenter et al.
patent: 2006/0212739 (2006-09-01), Boerstler et al.
patent: 2008/0111604 (2008-05-01), Boerstler et al.
patent: 2008/0229270 (2008-09-01), Boerstler et al.
patent: 2009/0007047 (2009-01-01), Boerstler et al.
patent: 2009/0021314 (2009-01-01), Boerstler et al.
patent: 2009/0128206 (2009-05-01), Boerstler et al.
patent: 2009/0132971 (2009-05-01), Boerstler et al.
patent: 2009/0138834 (2009-05-01), Boerstler et al.
patent: 2009/0183136 (2009-07-01), Boerstler et al.
patent: 2010/0199237 (2010-08-01), Kim et al.
patent: 0957605 (1999-11-01), None
U.S. Appl. No. 11/383,570, filed May 16, 2006, Boerstler et al.
U.S. Appl. No. 11/555,018, filed Oct. 31, 2006, Boerstler et al.
U.S. Appl. No. 11/380,982, filed May 1, 2006, Boerstler et al.
U.S. Appl. No. 11/381,031, filed May 1, 2006, Boerstler et al.
U.S. Appl. No. 11/381,050, filed May 1, 2006, Boerstler et al.
“Charge Pumps Shine in Portable Designs”, Dallas Semiconductor, Maxim Application Note 669, (Mar. 15, 2001), www.maxim-ic.com/an669, 15 pages.
Tsang et al., “Picosecond imaging circuit analysis”, IBM Corporation, IBM JRD, vol. 44, No. 4, (Jul. 4, 2000), pp. 583-603.
Bhatti et al., “Duty Cycle Measurement and Correction Using a Random Sampling Technique”, Proceedings of the 48thIEEE Int'l. Midwest Symposium on Circuits & Systems, (Aug. 2005), 4 pages.
“Cell Broadband Engine Architecture”, IBM Corporation, Ver. 1.0, (Aug. 8, 2005), 67 pages.
Matano et al., “A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer”, downloaded from www.elpida.com on Mar. 13, 2006, 2 pages.
Nam et al., “An All-Digital CMOS Duty Cycle Correction Circuit with a Duty-Cycle Correction Range of 15-to-85% for Multi-Phase Applications”, IEICE Trans. Electron., vol. E88-C, No. 4, (Apr. 2005), pp. 773-777.
Page, M., “IBM's Cell Processor: Preview to Greatness?”, (May 15, 2005), 6 pages.
Travis et al., “Circuit conditions variable-duty-cycle clock”, EDN Access, (Feb. 17, 1997), http://www.edn.com/archives/1997/021797/04DI—OI.htm, 2 pages.

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