Abberation mark and method for estimating overlay error and...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C356S400000, C356S401000

Reexamination Certificate

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10889803

ABSTRACT:
An aberration mark for use in an optical photolithography system, and a method for estimating overlay errors and optical aberrations. The aberration mark includes an inner polygon pattern and an outer polygon pattern, wherein each of the inner and outer polygon patterns include a center, and two sets of lines and spaces having a different feature size and pitch that surround the outer polygon pattern. The aberration mark can be used to estimate overlay errors and optical aberrations. In some embodiments, the mark can also be used with scatterometry or scanning electron microscope devices. In other embodiments, the mark can be used to monitor aberrations of a lens in an optical photolithography system.

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