AB class amplifier for controlling quiescent current

Details AB class amplifier for controlling quiescent current AB class amplifier for controlling quiescent current

2003-04-17

2004-12-28

Nguyen, Patricia (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

C330S257000

Reexamination Certificate

active

06836186

ABSTRACT:

BACKGROUND OF THE INVENTION
This application claims the priority of Korean Patent Application No. 2002-25134, filed May 7, 2002, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to an amplifier, and more particularly, to an AB class buffer amplifier which is capable of reducing power consumption by controlling quiescent current and driving current when operating as a B class amplifier.
2. Description of the Related Art
FIG. 1
is a diagram of a driver for driving a liquid crystal of a thin-film transistor-type liquid crystal display. Referring to
FIG. 1
, to drive a liquid crystal
140
, input voltages V
1
, V
2
, and V
3
, having different voltage levels, are applied to the liquid crystal
140
via voltage-follower-type amplifiers
110
,
120
, and
130
.
In order to display several colors, the liquid crystal
140
has to be charged, with various voltage levels, or discharged. In other words, a first switch SW
1
is turned on to drive the liquid crystal
140
with a first input voltage V
1
, and if necessary, the first switch SW
1
is turned off and a second switch SW
2
is turned on to drive the liquid crystal
1410
with a second input voltage V
2
. Current passing through the liquid crystal
140
must be rapidly sunk or absorbed. Thus, the voltage follower-type amplifiers
110
,
120
, and
130
used for driving the liquid crystal
140
must be AB class buffer amplifiers.
However, it is difficult for conventional AB class buffer amplifiers to control quiescent current since the intensity of the quiescent current is hundreds of thousands of uA. In other words, since integrated circuits included in portable products, such as drivers of liquid crystal displayers, require currents in the range of hundreds of thousands of uA, it is difficult to apply AB class buffer amplifiers to such circuits.
FIG. 2
is a diagram of an output port of a conventional A class buffer amplifier to which a comparator is added. Referring to
FIG. 2
, an output port
200
of a conventional A class buffer amplifier includes a PMOS transistor MP and an NMOS transistor MN
1
. A signal ODA output from an input node of an amplifier (not shown) is applied to a gate of the PMOS transistor MP. The output port
200
of the A class buffer amplifier further includes a comparator
210
and an NMOS transistor MN
2
. The NMOS transistor MN
2
is connected between an output node ONODE and a ground voltage VSS, and a signal SOUT output from the comparator
210
is applied to the gate of the NMOS transistor.
The output port
200
of the A class buffer amplifier shown in
FIG. 2
readily controls the quiescent current and turns on the PMOS transistor MP to readily increase the level of the voltage VOUT output from the output node ONODE. However, if the level of the output voltage VOUT is high, current has to flow to the ground voltage VSS in order to lower the level of the output voltage VOUT.
Here, it is difficult to rapidly sink the current toward the ground voltage VSS since the NMOS transistor MN
1
is turned on for a predetermined period of time by a bias voltage BIAS. Thus, the comparator
210
and the NMOS transistor NM
2
are employed to address this problem.
If the output voltage VOUT becomes higher than an input voltage VIN, the comparator
210
outputs the signal SOUT at a high level. Then, the NMOS transistor MN
2
is turned on and the current path is formed from the output node ONODE toward the ground voltage VSS to allow the current to flow. Thus, the output voltage VOUT may change to a lower level.
However, the comparator
210
used in the output node
200
of the A class buffer amplifier has an offset voltage. In other words, the comparator
210
outputs the signal SOUT at a high level only when the level of the output voltage VOUT becomes greater than the level input voltage VIN to a predetermined offset voltage or more. Thus, the minimum voltage level of the output voltage VOUT is determined by the offset voltage and the input voltage VIN.
FIG. 3
is a diagram of an output port of a conventional AB class buffer amplifier. Referring to
FIG. 3
, an output port
300
of a conventional AB class buffer amplifier includes a PMOS transistor MP and an NMOS transistor MN which are connected to each other in series between a power voltage VDD and a ground voltage VSS. A diode-type PMOS transistor M
3
is connected between a gate of the PMOS transistor MP and the power voltage VDD, and a diode-type NMOS transistor M
4
is connected between a gate of the NMOS transistor MN and the ground voltage VSS.
The gate of the PMOS transistor MP and the gate of the NMOS transistor MN are connected to a first current source IB
1
and a second current source IB
2
, respectively.
A quiescent current IQ of the output port
300
of the AB class buffer amplifier is controlled by a ratio of the size of the PMOS transistor MP to the size of the diode-type PMOS transistor M
3
. The quiescent current IQ is also controlled according to the ratio of the size of the NMOS transistor MN to the size of the diode-type NMOS transistor M
4
.
In other words, the quiescent current IQ=bias current IB
1
*(MP/M
3
)=bias current IB
1
*(MN/M
4
).
Accordingly, the quiescent current IQ can be controlled to flow in a small amount by controlling the parameters of the transistors MP, M
3
, MN, and M
4
. However, the diode-type transistors M
3
and M
4
operate as loads of bias transistors M
1
and M
2
. Thus, the diode-type transistors M
3
and M
4
reduce the gain of the output port
300
. As a result, a signal output from the output port
300
of the AB class buffer amplifier does not fully swing.
As described above, a signal output from the output port
200
of the A class buffer amplifier shown in
FIG. 2
does not fully swing due to the offset voltage, and a signal output from the output port
200
of the AB class buffer amplifier shown in
FIG. 3
does not fully swing due to the diode-type transistors that operate as a load. Thus, an AB class buffer amplifier is required to drive an external circuit of an amplifier using a high intensity of current by controlling the quiescent current IQ so that a small amount of the flowing quiescent current IQ is easily sourced or sunk to an output port.
SUMMARY OF THE INVENTION
To address the above-described limitations, it is an object of the present invention to provide an AB class buffer amplifier which is capable of driving an external circuit using a high intensity of current by freely controlling the amount of quiescent current and readily sourcing and sinking the quiescent current to an output port of the AB buffer amplifier.
Accordingly, to achieve the above object, there is provided an AB class buffer amplifier according to a first embodiment of the present invention. The AB class buffer amplifier includes a first current controller and a second current controller.
The first current controller sources current to an output node in response to a first logic level of a first signal, and buffers and outputs an input voltage to the output node in response to a second logic level of the first signal.
The second current controller sinks the current from the output node in response to a second logic level of a second signal, and buffers and outputs an input voltage to the output node in response to a first logic level of the second signal.
Here, the first and second signals are generated at the first logic level if the input voltage is higher than the output voltage and at the second logic level if the input voltage is lower than the output voltage.
The AB class buffer amplifier may further include comparing unit which compares the input voltage with an output voltage from the output node and generates the first and second signals in response to the compared results. The comparing unit includes first and second comparators.
The first comparator receives the input voltage via a positive node and the output voltage via a negative node, compares the input voltage with th

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