A frame line memory control circuit and method for controlling s

Details A frame line memory control circuit and method for controlling s A frame line memory control circuit and method for controlling s

1991-09-20

1994-02-22

Brinich, Stephen

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358442, G06K 900

Patent

active

052893103

ABSTRACT:
A circuit and method of controlling the write and read operations of video data onto a line memory without occurrence of any data collision between odd fields occurs with the line memory providing a thermal print head of a video printer with printing data, in a frame-by-frame printing system. The line memory is provided with a frame-by-frame reading and writing system upon storing the video data therein and upon providing printing data to a thermal print head of the video printer. The video data of a first odd field corresponding to a first line during a first odd field period and the video data of a first even field corresponding to the first line during a first even field period are written into the line memory. The video data of a second odd field corresponding to a second line during a second odd field period and concurrently thereto, a read out is enabled for the first odd and even field video data corresponding to the first line from the line memory to therefrom print out the corresponding video data in the video printer. The consecutive reading, writing, and printing steps are repeated until completing all the scanning lines on a single video screen.

REFERENCES:
patent: 4947345 (1990-08-01), Paradise et al.
patent: 5077810 (1991-12-01), D'Luna
patent: 5124813 (1992-06-01), Minowa et al.

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